From: Alexandru Ardelean Date: Fri, 18 Sep 2026 09:03:25 +0000 (+0300) Subject: gst1-plugins-base: re-enable the NEON audio resampler on 32-bit ARM X-Git-Url: http://git.99rst.org/?a=commitdiff_plain;h=017888a5cad41f10507aa23958b3e05c6ae2d3e5;p=openwrt-packages.git gst1-plugins-base: re-enable the NEON audio resampler on 32-bit ARM The NEON audio resampler has been compiled out of every 32-bit ARM build since 1.28. Its inline asm advances pointers with add.w, a Thumb-2 only mnemonic that gas rejects in ARM (A32) state, which is how OpenWrt builds ARM. The same add.w sits in the meson probe that gates HAVE_ARM_NEON, so the probe fails first and hides the broken asm behind the generic C path. Backport the upstream fix, which selects the operand form per ISA and drops add.w from the probe. Thumb-2 code generation is unchanged. Signed-off-by: Alexandru Ardelean --- diff --git a/multimedia/gst1-plugins-base/patches/100-audio-resampler-neon-a32-syntax.patch b/multimedia/gst1-plugins-base/patches/100-audio-resampler-neon-a32-syntax.patch new file mode 100644 index 000000000..bb3f3ceec --- /dev/null +++ b/multimedia/gst1-plugins-base/patches/100-audio-resampler-neon-a32-syntax.patch @@ -0,0 +1,144 @@ +From af3ad8dc31da3072bd6b9ce3e44cd20e6253c50d Mon Sep 17 00:00:00 2001 +From: "L. E. Segovia" +Date: Tue, 15 Sep 2026 17:50:56 -0300 +Subject: [PATCH] audio-resampler-neon: handle Thumb1-only builds correctly + +Fixes #5280 + +Part-of: + +Upstream-Status: Backport [https://gitlab.freedesktop.org/gstreamer/gstreamer/-/commit/af3ad8dc31da3072bd6b9ce3e44cd20e6253c50d] +Cherry-picked to the 1.28 branch as 4f4fec2de8b8 (!12501), so this patch +can be dropped at 1.28.8. + +Signed-off-by: Alexandru Ardelean +--- + .../gst-libs/gst/audio/audio-resampler-neon.h | 48 ++++++++++++------- + meson.build | 3 +- + 2 files changed, 31 insertions(+), 20 deletions(-) + +--- a/gst-libs/gst/audio/audio-resampler-neon.h ++++ b/gst-libs/gst/audio/audio-resampler-neon.h +@@ -20,6 +20,18 @@ + #include + #include + ++#if defined(__thumb2__) ++/* Thumb-2: request the wide encoding explicitly. */ ++#define ADD_W(x, y) "add.w " #x ", " #x ", %[" #y "]\n" ++#elif defined(__thumb__) ++/* Thumb-1 has no 3-operand ADD for high registers and no wide encodings. */ ++#define ADD_W(x, y) "add " #x ", %[" #y "]\n" ++#else ++/* ARM (A32) has a single 32-bit ADD encoding and rejects the .w width ++ * suffix as invalid syntax, so emit a plain 3-operand ADD. */ ++#define ADD_W(x, y) "add " #x ", " #x ", %[" #y "]\n" ++#endif ++ + static inline void + inner_product_gint16_full_1_neon (gint16 * o, const gint16 * a, + const gint16 * b, gint len, const gint16 * icoeff, gint bstride) +@@ -133,11 +145,11 @@ inner_product_gint16_cubic_1_neon (gint1 + "1:" + " mov r8, %[b]\n" + " vld1.16 {d16, d17}, [%[b]]!\n" +- " add.w r8, r8, %[bstride]\n" ++ ADD_W(r8, bstride) + " vld1.16 {d18, d19}, [r8]\n" +- " add.w r8, r8, %[bstride]\n" ++ ADD_W(r8, bstride) + " vld1.16 {d20, d21}, [r8]\n" +- " add.w r8, r8, %[bstride]\n" ++ ADD_W(r8, bstride) + " vld1.16 {d22, d23}, [r8]\n" + " vld1.16 {d24, d25}, [%[a]]!\n" + " subs %[len], %[len], #8\n" +@@ -214,11 +226,11 @@ interpolate_gint16_cubic_neon (gpointer + "1:" + " mov r8, %[a]\n" + " vld1.16 {d16, d17}, [%[a]]!\n" +- " add.w r8, r8, %[astride]\n" ++ ADD_W(r8, astride) + " vld1.16 {d18, d19}, [r8]\n" +- " add.w r8, r8, %[astride]\n" ++ ADD_W(r8, astride) + " vld1.16 {d20, d21}, [r8]\n" +- " add.w r8, r8, %[astride]\n" ++ ADD_W(r8, astride) + " vld1.16 {d22, d23}, [r8]\n" + " subs %[len], %[len], #8\n" + " vmull.s16 q0, d16, d24\n" +@@ -340,11 +352,11 @@ inner_product_gint32_cubic_1_neon (gint3 + "1:" + " mov r8, %[b]\n" + " vld1.32 {d16, d17}, [%[b]]!\n" +- " add.w r8, r8, %[bstride]\n" ++ ADD_W(r8, bstride) + " vld1.32 {d18, d19}, [r8]\n" +- " add.w r8, r8, %[bstride]\n" ++ ADD_W(r8, bstride) + " vld1.32 {d20, d21}, [r8]\n" +- " add.w r8, r8, %[bstride]\n" ++ ADD_W(r8, bstride) + " vld1.32 {d22, d23}, [r8]\n" + " vld1.32 {d24, d25}, [%[a]]!\n" + " subs %[len], %[len], #4\n" +@@ -426,11 +438,11 @@ interpolate_gint32_cubic_neon (gpointer + "1:" + " mov r8, %[a]\n" + " vld1.32 {d16, d17}, [%[a]]!\n" +- " add.w r8, r8, %[astride]\n" ++ ADD_W(r8, astride) + " vld1.32 {d18, d19}, [r8]\n" +- " add.w r8, r8, %[astride]\n" ++ ADD_W(r8, astride) + " vld1.32 {d20, d21}, [r8]\n" +- " add.w r8, r8, %[astride]\n" ++ ADD_W(r8, astride) + " vld1.32 {d22, d23}, [r8]\n" + " subs %[len], %[len], #4\n" + " vmull.s32 q0, d16, d24\n" +@@ -545,11 +557,11 @@ inner_product_gfloat_cubic_1_neon (gfloa + "1:" + " mov r8, %[b]\n" + " vld1.32 {q8}, [%[b]]!\n" +- " add.w r8, r8, %[bstride]\n" ++ ADD_W(r8, bstride) + " vld1.32 {q9}, [r8]\n" +- " add.w r8, r8, %[bstride]\n" ++ ADD_W(r8, bstride) + " vld1.32 {q10}, [r8]\n" +- " add.w r8, r8, %[bstride]\n" ++ ADD_W(r8, bstride) + " vld1.32 {q11}, [r8]\n" + " vld1.32 {q12}, [%[a]]!\n" + " subs %[len], %[len], #4\n" +@@ -623,11 +635,11 @@ interpolate_gfloat_cubic_neon (gpointer + "1:" + " mov r8, %[a]\n" + " vld1.32 {q8}, [%[a]]!\n" +- " add.w r8, r8, %[astride]\n" ++ ADD_W(r8, astride) + " vld1.32 {q9}, [r8]\n" +- " add.w r8, r8, %[astride]\n" ++ ADD_W(r8, astride) + " vld1.32 {q10}, [r8]\n" +- " add.w r8, r8, %[astride]\n" ++ ADD_W(r8, astride) + " vld1.32 {q11}, [r8]\n" + " subs %[len], %[len], #4\n" + " vmul.f32 q0, q8, q12\n" +--- a/meson.build ++++ b/meson.build +@@ -457,10 +457,9 @@ if host_machine.cpu_family() == 'arm' + #include + int32x4_t testfunc(int16_t *a, int16_t *b) { + asm volatile ("vmull.s16 q0, d0, d0" : : : "q0"); +- asm volatile ("add.w r1, r0, r0" : : : "r0", "r1"); + return vmull_s16(vld1_s16(a), vld1_s16(b)); + } +-''', name : 'NEON with 32-bit wide Thumb support') ++''', name : 'NEON support') + core_conf.set('HAVE_ARM_NEON', true) + endif + endif